SPICE MODEL of TC74VHC244F in SPICE PARK

SPICE MODEL of TC74VHC244F in SPICE PARK. English Version is http://www.spicepark.net. Japanese

  1. Tsuyoshi Horigome
    SPICE MODEL of TC74VHC244F in SPICE PARK. English Version is http://www.spicepark.net. Japanese
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    SPICE MODEL of TC74VHC244F in SPICE PARK
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    • 1. Device Modeling ReportCOMPONENTS : CMOS DIGITAL INTEGRATED CIRCUITPART NUMBER : TC74VHC244FMANUFACTURER : TOSHIBA Bee Technologies Inc. All Rights Reserved Copyright (c) Bee Technologies Inc. 2005
    • 2. Truth TableCircuit simulation result U1:1GBAR 0 U1:2GBAR 0 U1:1A1 0 U1:1A2 0 U1:1A3 0 U1:1A4 0 U1:2A1 0 U1:2A2 0 U1:2A3 0 U1:2A4 0 U1:1Y1 0 U1:1Y2 0 U1:1Y3 0 U1:1Y4 0 U1:2Y1 0 U1:2Y2 0 U1:2Y3 0 U1:2Y4 0 0s 0.5us 1.0us TimeEvaluation circuit _ U1 1G VCC LO _ 1A1 2G LO LO 2Y4 1Y1 1A2 2A4 LO LO 2Y3 1Y2 1A3 2A3 LO LO R1 V1 2Y2 1Y3 1MEG 1A4 2A2 LO LO 5 2Y1 1Y4 GND 2A1 LO 74VHC244 0Comparison table Input Output %Error G An Yn (Measurement) Yn (Simulation) L L L L 0 All Rights Reserved Copyright (c) Bee Technologies Inc. 2005
    • 3. Truth TableCircuit simulation result U1:1GBAR 0 U1:2GBAR 0 U1:1A1 1 U1:1A2 1 U1:1A3 1 U1:1A4 1 U1:2A1 1 U1:2A2 1 U1:2A3 1 U1:2A4 1 U1:1Y1 1 U1:1Y2 1 U1:1Y3 1 U1:1Y4 1 U1:2Y1 1 U1:2Y2 1 U1:2Y3 1 U1:2Y4 1 0s 0.5us 1.0us TimeEvaluation circuit _ U1 1G VCC LO _ HI 1A1 2G LO 2Y4 1Y1 HI 1A2 2A4 HI 2Y3 1Y2 HI 1A3 2A3 HI R1 V1 2Y2 1Y3 1MEG HI 1A4 2A2 HI 5 2Y1 1Y4 GND 2A1 HI 74VHC244 0Comparison table Input Output %Error G An Yn (Measurement) Yn (Simulation) L H H H 0 All Rights Reserved Copyright (c) Bee Technologies Inc. 2005
    • 4. Truth TableCircuit simulation result U1:1GBAR 1 U1:2GBAR 1 U1:1A1 0 U1:1A2 0 U1:1A3 0 U1:1A4 0 U1:2A1 0 U1:2A2 0 U1:2A3 0 U1:2A4 0 U1:1Y1 Z U1:1Y2 Z U1:1Y3 Z U1:1Y4 Z U1:2Y1 Z U1:2Y2 Z U1:2Y3 Z U1:2Y4 Z 0s 0.5us 1.0us TimeEvaluation circuit _ U1 HI 1G VCC _ 1A1 2G HI 2Y4 1Y1 1A2 2A4 X 2Y3 1Y2 1A3 2A3 X V1 R1 2Y2 1Y3 1MEG DSTM1 CLK 1A4 2A2 5 OFFTIME = .2uS 2Y1 1Y4 ONTIME = .2uS GND 2A1 74VHC244 0Comparison table Input Output %Error G An Yn (Measurement) Yn (Simulation) H X Z Z 0 All Rights Reserved Copyright (c) Bee Technologies Inc. 2005
    • 5. High Level and Low Level Input VoltageCircuit simulation result 6.0V 4.0V (572.504u,3.6252) Output Input 2.0V (529.901u,1.4951) 0V 0s 0.5ms 1.0ms 1.5ms 2.0ms V(OUT) V(V1:+) TimeEvaluation circuit _ U1 1G VCC LO _ 1A1 2G LO 2Y4 1Y1 OUT 1A2 2A4 2Y3 1Y2 V2 V1 = 0 V2 = 5 V1 1A3 2A3 TD = 0.5m R3 TR = 0.1m 2Y2 1Y3 5 TF = 0.1m 1MEG PW = 1m 1A4 2A2 PER = 2m 2Y1 1Y4 GND 2A1 74VHC244 0Comparison table VCC = 5 V Measurement Simulation %Error Min VIH = (VCC*0.7) V 3.5 3.6252 3.577 Min VIL = (VCC*0.3) V 1.5 1.4951 -0.327 All Rights Reserved Copyright (c) Bee Technologies Inc. 2005
    • 6. High Level and Low Level Output VoltageCircuit simulation result 5.0V 2.5V Output SEL> > 0V Input V(OUT) 5.0V 2.5V 0V 0s 5ms 10ms V(U1:1A1) TimeEvaluation circuit _ U1 1G VCC LO _ 1A1 2G LO 2Y4 1Y1 1A2 2A4 V1 = 0 V2 = 4.5 2Y3 1Y2 TD = 0.5m V1 V2 TR = 3n 1A3 2A3 TF = 3n PW = 1m 2Y2 1Y3 PER = 2m R1 4.5 1A4 2A2 0.09MEG 2Y1 1Y4 GND 2A1 74VHC244 0Comparison table VCC = 4.5V Measurement Simulation %Error VOH (V) 4.5 4.4978 -0.049 VOL (V) 0 0 0 All Rights Reserved Copyright (c) Bee Technologies Inc. 2005
    • 7. Propagation Delay TimeCircuit simulation result 5.0V 5.0V 1 2 Output Input 2.5V 2.5V > > 0V 0V 0s 0.5us 1.0us 1 V(TPLH_TPHL) 2 V(V1:+) TimeEvaluation circuit _ U1 1G VCC LO _ 1A1 2G LO tplh_tphl 2Y4 1Y1 1A2 2A4 2Y3 1Y2 V1 = 0 V2 = 5 1A3 2A3 TD = 0.2u V1 V2 TR = 3.8n 2Y2 1Y3 C1 TF = 3.8n PW = 0.5u 1A4 2A2 50p PER = 1u 5 2Y1 1Y4 GND 2A1 74VHC244 0Comparison table CL = 50 pF VCC = 5 Vtr = tf =3 ns Measurement Simulation %Error tPLH (ns) 5.4 5.4513 0.950 tPHL (ns) 5.4 5.4677 1.254 All Rights Reserved Copyright (c) Bee Technologies Inc. 2005
    • 8. Output enable time, high impedance (off) to high output (tPZH)Output disable time, high to high impedance (off) output (t PHZ)Circuit simulation result 5.0V 5.0V 1 2 Output Input 2.5V 2.5V > > 0V 0V 0s 0.5us 1.0us 1 V(TPZH_TPHZ) 2 V(V1:+) TimeEvaluation circuit _ U1 1G VCC _ HI 1A1 2G HI tpzh_tphz 2Y4 1Y1 1A2 2A4 2Y3 1Y2 V1 = 0 V2 = 5 1A3 2A3 TD = 0.2u V1 C1 TR = 3.8n 2Y2 1Y3 R1 R2 V2 TF = 3.8n 50p PW = 0.5u 1A4 2A2 1K 1K PER = 1u 2Y1 1Y4 5 GND 2A1 74VHC244 0Comparison table CL = 50 pF, RL = 1 k VCC = 5 Vtr = tf =3 ns Measurement Simulation %Error tPZH (ns) 6.2 6.2419 0.676 tPHZ (ns) 6.7 6.7540 0.806 All Rights Reserved Copyright (c) Bee Technologies Inc. 2005
    • 9. Output enable time, high impedance (off) to low output (tPZL)Output disable time, low to high impedance (off) output (t PLZ)Circuit simulation result 5.0V 5.0V 1 2 Output Input 2.5V 2.5V > > 0V 0V 0s 0.5us 1.0us 1 V(TPZL_TPLZ) 2 V(V1:+) TimeEvaluation circuit _ U1 1G VCC _ 1A1 2G HI LO tpzl_tplz R2 2Y4 1Y1 1A2 2A4 1K 2Y3 1Y2 V1 = 0 V2 = 5 1A3 2A3 TD = 0.2u V1 C1 V2 V3 TR = 3.8n 2Y2 1Y3 R1 TF = 3.8n 50p PW = 0.5u 1A4 2A2 1K PER = 1u 10 5 2Y1 1Y4 GND 2A1 74VHC244 0Comparison table CL = 50 pF, RL = 1 k VCC = 5 Vtr = tf =3 ns Measurement Simulation %Error tPZL (ns) 6.2 6.2156 0.252 tPLZ (ns) 6.7 6.7531 0.793 All Rights Reserved Copyright (c) Bee Technologies Inc. 2005
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